Overview
The Extended Analog Computer project has many opportunities for research and development in the general areas of infrastructure/tools and applications. This is list is a starting point to keep in from of us as we move forward. Given the breadth of the scope of these challenges, contributers from many different electrical hardware and software should be able to find a good fit for their background. I believe that each one of these areas to be fertile areas for research into this novel form of computing.
Infrastructure
Conductive Substrate Development
The conductive foam substrate that we have been using on the uEAC boards was chosen for it's low cost and easy of use. As we apply the EAC technology, other substrates have been identified that have properties which make them superior for certain applications. This development area involves the selection and development of alternate substrates given application driven electrical and mechanical properties. It is likely that to accommodate these new materials, electrical changes will be needed in the analog interface electronics. Here are some of the properties that should be considered for improvement.
- Modified current levels to support new substrates electrical properties
- Increased Bandwidth
- Improvement Current Delivery Accuracy
- Circuit Fault Detection/Feedback
- Component Count Reduction
- Circuit Area Reduction
Analog Interface Circuit for uEAC R002 board
Simulator Development
We currently have a simulator for the EAC technology that is aimed a single sheet, non-local feedback EAC systems. As we progress, there is a need to allow for intra-sheet feedback and multi-sheet systems. This is leading to the development of a scalable simulator that will allow researchers to leverage simulation for experiments with large clusters of EACs. This simulator will be able to synthesize large numbers of EAC nodes spread across multiple digital nodes.
System Visualization
Our work to date has focused on visualizing the data from a single EAC node. A screen shot from a tool called pyeac is shown below. This tool allow the control and visualization of a single physical EAC node. As we progress forward with the research we need to develop interfaces that allow us to visualize large numbers of nodes arranged in configurable architectures.
Language Development
A simple command language was developed to be used to control and collect date from a single uEAC. For large scale EAC experiments, a language modeled after an HDL such as Verilog or VHDL needs to be developed that allows architectures and configurations of EACs to be specified.
